1. Field of the Invention
The present invention relates to a protective relay device for protecting an electric power system.
2. Description of the Related Art
Japanese Patent Application Laid-open No. H07-131923 discloses a correction technique when, although sampling synchronization is maintained, there is a mismatch in sampling timing or, in other words, when there is a phase error. More particularly, although the correction technique is intended to perform a variety of corrections including correction of errors in, for example, an analog filter, it is also effective in correction of a mismatch only in sampling timing.
Moreover, Japanese Patent Application Laid-open No. S62-262615 discloses a technique of securing sampling synchronization of a digitizing unit that digitizes system electrical quantities at two places.
Furthermore, Japanese Patent Application Laid-open No. H02-113746 discloses a technique of securing sampling synchronization of a digitizing unit that digitizes a plurality of system electrical quantities in synchronous network communication; while Japanese Patent Application Laid-open No. 2000-152486 discloses a technique of securing sampling synchronization of a digitizing unit that digitizes a plurality of system electrical quantities in asynchronous network communication.
In each of the abovementioned conventional techniques, a digitizing unit that digitizes a system electrical quantity and a digital computing unit that performs digital computation by the use of digitized data are maintained in synchronization. Thus, the abovementioned conventional techniques are applicable to a type of system in which sampling synchronization is maintained in advance or to a type of system in which sampling synchronization is secured.
For example, in the correction technique disclosed in Japanese Patent Application Laid-open No. H07-131923, relay computation is performed by activating a software for relay computation as soon as a plurality of analog-to-digital (AD) converting units in the same apparatus releases output. In that case, the timing of releasing output from each AD converting unit is maintained in sampling synchronization. Thus, the system disclosed in Japanese Patent Application Laid-open No. H07-131923 is the “type of system in which sampling synchronization is maintained in advance”. In such a system, relay computation is performed in a periodic manner with a certain time interval maintained for each turn of relay computation.
In the technique disclosed by Japanese Patent Application Laid-open No. 2000-152486, sampling synchronization is not maintained because an asynchronous communication network is used for transferring system electrical quantities. However, because relay computation is started after all of the output from a digitizing unit, which digitizes a plurality of system electrical quantities, has arrived, continuity of the relay computation is secured. Thus, the system disclosed in Japanese Patent Application Laid-open No. 2000-152486 is the “type of system in which sampling synchronization is secured”.
However, when sampling frequencies are different for digitizing units that digitize a plurality of system electrical quantities, i.e., in the case of a type of system in which sampling synchronization is not secured, following problems arise.
For example, assume that sampling frequencies are different for digitizing units. Generally, an analog filter in each digitizing unit has sufficient attenuation characteristics to remove loopback errors based on the sampling theorem. For this reason, when data to be used in computation is obtained after performing correction on different data at closer times from among data that is sampled at different sampling frequencies, the high frequency characteristics of the relay apparatus get affected. That makes it difficult to commoditize digital filters. As a result, it becomes necessary to arrange a digital filter corresponding to a frequency of a computation cycle for each sampling frequency. That results in an increase in the size and the manufacturing cost of the apparatus.
Moreover, when sampling frequencies are different for digitizing units and when relay computation is started after all of the output from the digitizing units have arrived, a mismatch occurs with time in the output timing of the digitizing units. That causes an increase in the phase error between the output of each digitizing unit and loss of data used in periodic relay computation.
Meanwhile, the case of non-identical sampling frequencies of digitizing units also includes a situation when there is only a slight difference in the sampling frequencies. For example, consider a case when a first digitizing unit performs AD conversion at an integral multiple of 60.000 hertz and a second digitizing unit performs AD conversion at an integral multiple of 60.001 hertz. In such a case, the sampling frequencies match at certain times thereby enabling to secure time interval for relay computation. However, the time interval for relay computation goes on decreasing with time thereby causing an increase in the phase error between the output of each digitizing unit and loss of data. That results in the occurrence of abovementioned problems.